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The Mini-Altair

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Version 1

Version 2

Version 3

Version 4

Version 1

Picture of Mini-Altair V1Top View
The Mini-Altair V1 Bottom ViewBottom View
The Mini-Altair V1 Screen ShotScreen Shot

Version 1 is a minimal hardware configuration that will run Altair BASIC.  It consists of an 8085 CPU, a RAM chip, a 6850 UART, a latch and some glue logic and a PIC microcontroller.  On power up the PIC loads the Altair bootloader into RAM, then resets the 8085 and starts it running.  BASIC can then be loaded through the 6850 serial port.

Theory of Operation

The core system consists of the CPU, Memory, and UART.  The PIC microcontroller is used the pre-load the RAM while holding the 8085 using the HOLD line.  When the 8085 RESET line is released, it starts running at location 0.

Schematic

Note the schematic does not show all the power supply and ground connections to the chips or the bypass capacitors.

CPU

The 8085 was chosen because it is software compatible to the 8080A but is easier to use because of the following improvements:
The Z80 was not chosen because it is not 100% software compatible with the 8080A.  The original Altair Basic won't run on the Z80.

The 8085 runs at 3 MHz clock frequency with a 6 MHz crystal.  The HOLD line is used by the PIC to share the memory and UART with the 8085.  When the HOLD line is asserted, the 8085 address, RD, WR, and IO/M lines are tri-stated.

Address Latch

The lower 8 bits of the address is latched off of the data bus with a 74LS373.  The latch is clocked by LE.  LE is pulsed either by the PIC MCUALE line or at the beginning of each machine cycle by the 8085 ALE line.

Memory

32K bytes of static RAM is provided by a CY62256.  The memory can be accessed by either the 8085 or the PIC.  The RD and WR lines are connected to both the 8085 and the PIC tri-state outputs  in a wired-or fashion.  The RAM is enabled by RAMCE when the address is in the lower 32KB of the address space and the current CPU cycle is a memory access (not an IO cycle).

UART

The 6850 UART can be accessed by either the 8085 or the PIC.  UCLK is the baud rate clock which is generated by the PIC.  The 6850 bus interface is clocked by the E line which is driven by UE.  UE is asserted whenever RD or WR go low.  The 8085 status signal S1 provides an early R/W signal that is stable when E is pulsed.  S1 is multiplexed with MCUS1 from the PIC depending on the state of the HOLD line.  The resulting US1 drives the UART R/W input.  The UART is intended to be mapped to IO addresses 020 and 021 (octal).  Actually only address bits A0, A4 and A7 are decoded, so the UART will respond to any addresses 0XX1XXX0 and 0XX1XXX1.  RxData and TxData are 5V RS232 lines and must be converted by a level shifter like a MAX232 to connect to a true RS232 terminal or a PC serial COM port.

PIC

The PIC18F320 microcontroller performs several functions.  It runs off it's internal oscillator at 8 MHz (2 MIPs).

Firmware

The PIC firmware is written in C for the Microchip C18 compiler.  A free version of the compiler is available.  <delays.h>, <timers.h> and <pwm.h> refer to the libraries included with the compiler.  buf[] contains the binary image of the Altair bootloader.  In this case it is the 12K Extended BASIC bootloader.  Details of the various bootloaders can be found in the Altair 8800 BASIC Reference Manual.  The program sets the PWM to output the baud rate clock for the 6850, then outputs a welcome message through the 6850.  It then writes values to RAM and reads them back, outputting them in octal 8 bytes per line.  It then sets up the PSP port to contain the value of the sense switches (in this case just 0).  Finally it releases the HOLD and RESET lines which start up the 8085 at location 0 while the PIC idles in an infinite loop.